1. Field of the Invention
The present invention relates to a system for driving a plasma display panel (PDP) device, and more particularly to the supply of the discharge voltage to the electrodes of the plasma display panel.
2. Description of the Prior Art
In general, a plasma display panel of an AC type has a first and a second plurality of electrodes which are disposed to traverse each other in the form of a matrix and are covered with dielectric layers. A discharge is formed in a confined discharge gas between the electrodes at a cross point of one of the first electrodes and one of the second electrodes.
A prior art driving circuit of a plasma display panel is illustrated in FIG. 1, and a time chart of the operation of the device of FIG. 1 is illustrated in FIG. 2.
X-directional electrodes 21, 22,-, 2n and Y-directional electrodes 31, 32,-, 3n of a plasma display panel 1 are supplied with voltage sustaining voltages V.sub.S and information writing-in voltages V.sub.W, -V.sub.W by a drive circuit 4 which comprises a switching network with transistors and diodes. Dischargeable spots are formed by cross points between the X-directional electrodes 21, 22,-, 2n and the Y-directional electrodes 31, 32,-, 3n.
If a signal x(al) is applied during the period t.sub.1 to t.sub.2, and a signal x(bl) is applied during the period t.sub.2 to t.sub.3, an output voltage V(xl) is supplied to the electrode 21, during the period t.sub.1 to t.sub.2, as illustrated in (1), (2) and (3) of FIG. 2.
If a signal y(al) is applied during the period t.sub.4 to t.sub.5, and a signal y(bl) is applied during the period t.sub.5 to t.sub.6, an output voltage V(yl) is supplied to the electrode 31 during the period t.sub.4 to t.sub.5, as illustrated in (5) and (6) of FIG. 2 and (2) of FIG. 3.
Sequences of pairs of the signals x(al) and x(bl) and pairs of the signals y(al) and y(bl) are applied alternatively. Accordingly, sequences of the signals V(xl) and the signals V(yl) are generated alternatively. As a result, to the spot formed by the cross point of the electode 21 and the electrode 31, a sequence of the voltage V(xy) represented by the wave form (4) of FIG. 3 is supplied. The height of the wave V(xy) is equal to the discharge sustaining voltage V.sub.s.
The base voltages of the transistors 451 through 45n are controlled when the information writing-in voltages V.sub.W, -V.sub.W are applied.
A writing-in of an information is effected by applying writing in voltages V.sub.W, -V.sub.W to the electrodes 21 and 31, respectively, as illustrated in (4) of FIG. 2 and (3) of FIG. 3. Accordingly, a consequent writing-in voltage 2V.sub.W appears in the wave form of V(xy) as illustrated in (4) of FIG. 3 during the period t13 to t14.
In the plasma display panel 1 illustrated in FIG. 1, a current of approximately 100 .mu.A passes through a discharge occurring in a spot formed by the cross point of the electrodes. Since currents of the discharge formed in spots formed by cross points of the electrodes are supplied from the same power source, a fluctuation of the discharge sustaining voltage between the electrodes occurs if the number of the discharging spots is large because a large current must be derived from the power source. Such a fluctuation of the discharge sustaining voltage between the electrodes makes writing-in and erasing of information of a plasma display panel difficult.
The relationship between the discharge sustaining voltage and the number of discharging spots in a prior art plasma display panel is illustrated in FIG. 4. In FIG. 4, the abscissa represents the ratio Rd in percentage of the number of discharging spots to the number of the entire spots, and the ordinate represents the discharge sustaining voltage. No discharge is maintained in the region below the lower limit curve L running from p4 through p6. Excessive discharges occur in the region over the upper limit curve U running from p1 through p3. Accordingly, an appropriate discharge occurs only in the range between the curves L and U. In the prior art plasma display panel, the discharge sustaining voltage V(q2) is selected as the mean value of V(p1) and V(p4). This voltage V(q2) is constant in the range of 0% through 100% of Rd. Accordingly, the width plq4 of the margin M.sub.0 has to be limited below a predetermined value. Sometimes it happens that no margin is obtained in the characteristic illustrated in FIG. 4. Therefore, such a characteristic as illustrated in FIG. 4 is disadvantageous for the operation of a plasma display panel.
A prior art plasma display panel providing a circuit for controlling the discharge sustaining voltage is disclosed in, for example, Japanese Patent Application Laid-open Publication No. 50-62538.